Design and Implementation of Hogge Phase Detector using Transmission Gate Logic

Authors

  • Karan M. Jani P.G.Student C. U. Shah College of Engineering and Technology Department of E&C, Wadhwan, Gujarat, India.
  • D.N.Khandha Asst. Professor C. U. Shah College of Engineering and Technology Department of E&C, Wadhwan, Gujarat, India
  • B.H.Nagpara Asst. Professor C. U. Shah College of Engineering and Technology Department of E&C, Wadhwan, Gujarat, India

Keywords:

Phase Detectors, Hogge Phase Detectors, Transmission Gate Logic, Timing Diagrams, Simulation Results

Abstract

Phase detector is the first block of Phase Locked Loop. It is a nonlinear device the output of which contains
the phase difference between the two oscillating signals. The advantage in most of the phase detector is that their low
frequency response is actually linear over some range rather than sinusoidal. A different view is required in the analysis
of digital phase detector from that of classical mixing detectors. The exact behavior of these digital phase detectors
should be nonlinear but the low frequency behavior is often linear. The circuit of phase detectors is more important in
dealing with specific circuit conditions than to make analysis simpler. The Hogge Phase Detector using Transmission
Gate Logic in 45nm CMOS technology is implemented here in LTSpice IV tool because of its small output jitter and selfcorrecting ability and linearity.

Published

2016-02-25

How to Cite

Karan M. Jani, D.N.Khandha, & B.H.Nagpara. (2016). Design and Implementation of Hogge Phase Detector using Transmission Gate Logic. International Journal of Advance Research in Engineering, Science & Technology, 3(2), 178–182. Retrieved from https://ijarest.org/index.php/ijarest/article/view/439