AUTOMATIC NUMBER PLATE RECOGNITION AND ITS FPGA IMPLEMENTATION

Authors

  • Mr. Prasad Prakash Sutar Department of Electronics and Telecommunication, Sinhgad Institute of Technology, Lonavala, Maharashtra, India
  • Prof. Pravin C. Latane Department of Electronics and Telecommunication, Sinhgad Institute of Technology, Lonavala,Maharashtra, India

Keywords:

Automatic License plate recognition, canny edge detection, Modelsim-6.3f and FPGA Altera Cyclone IV family

Abstract

This paper reveals about the design and development of automatic number plate recognition [ANPR]. Since it is simpler and
faster than the traditional system, it has all the potential to replace the existing system. In this system we are going to work on the
video. Video captured by ANPR camera and processed using dynamic image processing technique. After that edge detection and
template matching is done. Finally result is obtained in ASCII character which will be converted in alphanumeric character
using MAT LAB. Number plate localization stage is very important to identify the license plate number in ANPR system. This
system provides very low complexity. Also provide number plate detection rate is high by using canny edge detection algorithm.
The proposed architecture has been successfully implemented and tested using Model-Sim 6 and Field Programmable Gate
Array (FPGA) Altera Cyclone IV family development board. The proposed architecture will be implemented as a real time
application for automated toll collection. It will be saves users valuable time by reducing the queue length in front of the toll
counter.

Published

2015-08-25

How to Cite

Mr. Prasad Prakash Sutar, & Prof. Pravin C. Latane. (2015). AUTOMATIC NUMBER PLATE RECOGNITION AND ITS FPGA IMPLEMENTATION. International Journal of Advance Research in Engineering, Science & Technology, 2(8), 98–104. Retrieved from https://ijarest.org/index.php/ijarest/article/view/282