1.
Ms. Aishwarya Hiremath, Prof. Bairu K.Saptalakar. Implementation Of 32-Bit Kogge-Stone Adder Using FPGA Technology. IJAREST [Internet]. 2016 May 25 [cited 2025 Dec. 16];3(5):580-7. Available from: https://ijarest.org/index.php/ijarest/article/view/672